The present invention relates to a driving circuit that drives an array of recording elements, such as light-emitting diodes in an electrophotographic printer or heating elements in a thermal printer.
The light-emitting diodes (hereinafter, LEDs) in an electrophotographic printer illuminate a charged photosensitive drum, responsive to print data, thereby creating an electrostatic latent image. The latent image is developed with toner, transferred to paper, and fused onto the paper. The driving circuit in this case typically includes about twenty-six driver integrated circuits (ICs) that drive respective LED array chips. The print data are transferred from one driver IC to the next in synchronization with a clock signal.
U.S. Pat. No. 5,864,253 discloses a print head that employs a differential pair of clock signals, which are supplied in parallel to the driver ICs. One purpose of this arrangement is to avoid having the clock signals generate electromagnetic interference. Since the two clock signals are complementary, electromagnetic radiation from one clock signal line is canceled out by electromagnetic radiation from the other clock signal line.
When the clock signal lines are widely separated, however, as shown in the above patent, they are themselves susceptible to external electromagnetic interference, referred to below as noise. Another problem is that if the widely separated clock signal lines have stubs for delivery of the clock signals to the driver ICs, the clock signals may be partly reflected at the stubs. Both noise and reflections distort the waveforms of the clock signals, sometimes making it difficult for the driver ICs to detect the relative levels of the clock signals correctly. A particular problem is distortion of the transitions of the clock signal waveforms by multiple reflections. In the worst case, such distortions can cause data transfer errors, leading to incorrect printing.
Further information about these problems will be given in the detailed description of the invention.
An object of the present invention is to increase the noise immunity of a driving circuit that transfers print data in synchronization with a pair of differential clock signals.
Another object of the invention is to reduce reflection of the differential clock signals.
Still another object is to increase the clock frequency at which the driving circuit can operate.
The invented driving circuit supplies driving current to an array of recording elements, responsive to the print data. In addition to having first and second clock signal lines carrying differential clock signals, the driving circuit has a cascaded series of driver ICs with respective first clock input terminals and second clock input terminals. The clock signal supplied to the first clock input terminal of the first driver IC is supplied to the second clock input terminal of the next driver IC in the cascaded series. Conversely, the clock signal supplied to the second clock input terminal of the first driver IC is supplied to the first clock input terminal of the next driver IC.
The driver ICs also have respective data input terminals and data output terminals, which are interconnected for transfer of the print data from one driver IC to the next in synchronization with the differential clock signals. Each driver IC may generate an internal clock signal from the differential clock signals received at its clock input terminals, and use the internal clock signal to synchronize the transfer of the print data.
Preferably, the first clock signal line is coupled to the first clock input terminals of odd-numbered driver ICs and the second clock input terminals of even-numbered driver ICs in the cascaded series, the second clock signal line is coupled to the second clock input terminals of the odd-numbered driver ICs and the first clock input terminals of the even-numbered driver ICs, and at least the even-numbered driver ICs have a clock inverting circuit for inverting the internal clock signal.
The invention also provides a printed wiring board including the invented driving circuit. On this printed wiring board, the first and second clock signal lines are preferably mutually adjacent, and preferably weave around electrode pads and/or wiring patterns used to interconnect the driver ICs. The preferred even-odd variation of the interconnections between the driver ICs and the clock signal lines facilitates the mutually adjacent weaving layout of the clock signal lines, which improves their noise immunity.
The clock signal lines preferably include in-line electrode pads to which the clock input terminals of the driver ICs are coupled. The in-line electrode pads reduce reflection of the clock signals because they avoid characteristic-impedance discontinuities.
The clock inverting circuit may be a switching circuit, present in all of the driver ICs, that selectively interchanges the inputs to a differential amplifier. The inputs are interchanged in even-numbered driver ICs but not in odd-numbered driver ICs. The differential amplifier generates the internal clock signal. This arrangement avoids timing differences between even-numbered and odd-numbered driver ICs, enabling the clock frequency to be increased.